Walter Roberson <roberson@Ibd.nrc.ca> provided the following table.
  '3rd' indicates the memory is available from 3rd party vendors.

  IRIS 3000 series (MC68020 based): ??; scrap these if you aren't a
  collector

  4D/20, 4D/25: Industry Standard 30 pin; 80-100 ns; 3rd; see notes 1-3

  4D/30, 4D/35, R3000 Indigo: SGI Custom 64 pin w/ASIC, parity; 3rd
  common; see note 4

  4D/50, 4D/60 (cs12), 4D/70, 4D/80, 4D/85: SGI Custom??; 3rd uncommon;
  see notes 5-6

  4D/110: SGI Custom??; no known source

  4D/1[2-8]0, 4D/[234][1-8]0, Crimson: SGI Custom, ECC; 3rd; see notes
  7-8

  Challenge/Onyx: SGI Custom, ECC; 3rd

  Power Challenge/Onyx: SGI Custom, same as Challenge/Onyx; 3rd

  R4000 Indigo, Indy, Indigo^2: Industry Standard 72 pin pop-up page-mode
  parity; 3rd very common

  Power Indigo^2: as for Indigo^2 but has distinct 128Mb upgrade

  R10000 XXX: as for base XXX system for now, will require higher-speed
  memory subsystems to get full performance.

  Notes:

  1.  4D/2[05] can mix 1M and 2M SIMMs, but not 1M or 2M with 4M.

  2.  4D/2[05] PROM requires first 4MB SIMMs in each bank to power-up
      without a parity error. Hitachi are bad; Toshiba, among others,
      are good. Does not apply to very early 4D/20.

  3.  All slots must be populated when using double-high 1 MB SIMMs.

  4.  An ASIC bug prevents using multiple banks of 4 Mb SIMMs.

  5.  4D/70 max is 16 Mb main memory plus 128 Mb expansion boards.
      Some 4D/70s support 4 MB SIMMs for 64 Mb local main memory.

  6.  4D/80 max is 16 Mb main memory plus 128 Mb expansion boards.
      4D/80 could support 48 Mb local main memory if two PALs were
      changed.

  7.  MC2, MC3 cannot mix standard and high density SIMMs.

  8.  Crimson memory should be sorted highest capacity first to lowest
      last.

  In each case, memory MUST be added in groups of 4 SIMMs. Substantial
  slowdowns might occur with the Challenge/Onyx and Power Challenge/Onyx
  if SIMMs are not added in groups of 8 or as required to fill all
  'leaves'.